IBM, AMD Team On New Strained Silicon

In a statement ahead of the IEEE International Electron Devices Meeting in San Francisco, the two companies called the technology a "breakthrough process" that will speed up transistors by 24 percent without increasing power levels. The strained silicon technique will work jointly with IBM's silicon-on-insulator technology, a previous advance that also boosted performance.

AMD said it plans to integrate the strained silicon technology into all of its 90-nanometer platforms by the first half of next year—at about the same time the Sunnyvale, Calif.-based company will be readying its first dual-core processors. IBM, Armonk, N.Y., issued a similar statement about using strained silicon in its Power processors.

The strained silicon technology and the AMD-IBM collaboration fuels the companies' race with microprocessor giant Intel to achieve higher performance and lower power consumption.

Next year, Intel also plans to begin shipping dual-core chips, and the Santa Clara, Calif.-based company will use a more efficient 65-nanometer manufacturing process that stands to boost processor performance. Intel also produces its own chipsets and will provide supporting technology designed to enhance audio, graphics and digital applications, as well as add more management functionality.

AMD, Intel's main rival on the desktop, hasn't yet specified when it plans to begin shifting from 90 nanometers to 65 nanometers. However, the AMD-IBM collaboration also calls for the companies to jointly develop 65-nanometer and 45-nanometer chips.